(a) Field of the Invention
The present invention relates to a timer assembly and, more particularly, to a timer assembly having a function for outputting a pulse-width-modulated (PWM) signal.
(b) Description of the Related Art
PWM signals are generally used in a technical field for driving a variety of motors, for generating sinusoidal signals having desired frequencies.
Patent Publication JP-A-61-251484 describes a conventional PWM control technique applied to an inverter implemented by digital circuit elements. Patent Publication JP-A-7-231688 describes a phase locked loop (PLL) circuit having a PWM signal generator for generating an output clock signal based on a reference clock signal by using synchronous processing and PWM processing.
FIG. 1 shows a typical configuration of a timer assembly used for generating a PWM signal. The timer assembly includes a register 601, a selector 602, a timer 604, a comparator 605, a buffer register 606 and a signal processor 609.
The register 601 receives and stores a setting for resolution which defines the resolution of the timer assembly by specifying a desired clock signal. The selector 602 selects one of a plurality of clock sources CS1 to CSn based on the setting stored in the register 601 to provide a specific clock signal (count clock signal) 603 based on which the timer 604 is to count.
The timer 604 counts based on the clock signal 603 to deliver a count signal to the comparator 605, and also deliver an overflow signal 607 to the signal processor 609 and the buffer register 606 when the count of the timer 604 exceeds a timer setting therein.
The buffer register 606 receives and stores a duty setting, which specifies the duty of the PWM signal to be supplied from the signal processor 609 as an output from the timer assembly. The comparator 605 compares the count by the timer 604 against the duty setting supplied from the buffer register 606 to deliver a coincidence signal 608 to the signal processor 609 upon coincidence of the count of the timer 604 with the duty setting. The buffer register 606 delivers the duty setting to the comparator 605 in response to the overflow signal 607.
The signal processor 609 responds to the overflow signal 607 and the coincidence signal 608 to generate a PWM signal, and delivers the resultant PWM signal through an output terminal 610 to an external circuit, which generates a sinusoidal signal based on the PWM signal.
Figs, 2A and 2B show timing charts of the timer assembly shown in FIG. 1. In operation of the timer assembly, the timer 604 counts the clock signal 603 selected by the selector 602 based on the setting of the register 601. In the example of these drawings, it is shown that the timer setting is set at seven.
The count by the timer 604 based on the clock signal 603 starts from zero to the timer setting (seven), and returns to zero for next counting when the count exceeds the timer setting. The timer 604 iterates the counting between the zero count and the timer setting to specify the repetitive period (referred to as simply xe2x80x9cperiodxe2x80x9d) of the output PWM signal, which is equal to the time interval between the zero count and the timer setting by the timer 604. The duty of the PWM signal is defined by the time interval between the time instant of the coincidence signal and the time instant of the overflow signal.
In the examples of both FIGS. 2A and 2B, the duty setting of the buffer register 606 is set at one, whereby the comparator 605 delivers a coincidence signal at the count xe2x80x9c1xe2x80x9d of the timer 604. The buffer register 606 updates the next duty setting each time the timer 604 delivers the overflow signal 608, and delivers the next setting to the comparator 605. The duty of the PWM signal is updated at a desired timing by an external device such as a microcomputer, which responds to the overflow signal as an interrupt signal.
As described above, in the timer assembly of FIG. 1, if a sinusoidal is to be generated sequence of PWM pulses, the microcomputer uses a data table for specifying the duty of each PWM pulse based on the instantaneous amplitude of the desired sinusoidal signal. If the frequency of the sinusoidal signal is to be changed, the microcomputer provides the duty setting of the buffer register 606 based on the data for the frequency of the sinusoidal signal among a variety of sinusoidal signals having respective frequencies. The data for the variety of sinusoidal signal require a large storage capacity.
In addition, it is difficult to change the selection of clock signal by the selector 602 in synchrony with the output PWM signal to change the period of the output PWM signal. More specifically, as understood from FIGS. 2A and 2B which show actual timing chart and desired timing chart, respectively, at the changeover between clock signals, since the timing of the changeover between the clock signals is slightly delayed in FIG. 2A, the waveform of the PWM signal varies depending on the delay of the changeover. The frequency of the sinusoidal signal specified by the PWM signal varies accordingly, which is undesirable.
Moreover, if the frequency of the sinusoidal signal is to be changed, the end of the period must be monitored by detecting the overflow signal using a software of interrupt operation by the microprocessor, for example, which consumes a large time length.
FIGS. 3A and 3B depict respective combinations of waveforms of a PWM signal and a resultant sinusoidal signal having a lower frequency and a higher frequency, respectively. As understood from FIGS. 3A and 3B, since the clock signal 603 is fixed in the conventional timer assembly, the frequency of the PWM signal is fixed, which causes that the number of pulses in one period of the sinusoidal signal differs between different frequencies for the sinusoidal signal. This results in that an accurate sinusoidal waveform cannot be obtained from the PWM pulses in case of a higher frequency of the sinusoidal signal.
In short, the conventional timer assembly cannot provide a large variety of PWM signals for generating a large number of sinusoidal waveforms without involving a larger circuit scale of the time assembly, and cannot provide an accurate waveforms for a sinusoidal signal having a higher frequency.
It is therefore an object of the present invention to provide a timer assembly which is capable of providing a large variety of PWM signals for generating a larger number of sinusoidal waveforms without involving a larger circuit scale of the time assembly, and providing an accurate waveform even in case of a higher frequency of the PWM signal.
The present invention provides a timer assembly including: a PWM signal generator including a selector for selecting one of a plurality of clock sources based on a control signal, a timer for counting clock pulses in a selected one of the clock sources to deliver a count signal representing a count in the timer and an overflow signal when the count in the timer exceeds a setting, a signal processor for generating a PWM signal based at least on the overflow signal; a count controller for responding to the overflow signal to deliver the control signal when a number of successive overflow signals exceeds a specified number.
In accordance with the timer assembly of the present invention, since the count controller delivers a control signal each time a specified number of overflow signals are generated, the clock signal can be changed at the desired timing of the PWM signal which may correspond to the end of a single period of the sinusoidal signal to be generated from the PWM signal. This affords a configuration wherein the clock signal can be changed in synchrony with the PWM signal, whereby an accurate waveform can be obtained for a higher-frequency sinusoidal signal.